DSLogic Logic Analyzer 16 Channels 400M Sampling USB-based Debugging

Description:

• DSCope is a USB-based logic analyzer. The sampling section is also based on the Xilinx Spartan-6 FPGA + SDRAM architecture, which uses a differential signal and variable gain amplifier architecture to provide 50MHz analog bandwidth and up to 400MHz single channel sampling frequency.

DSLogic Plus Version Specifications:

• Mode:stream+buffer

Buffer mode:

•  400M@4 channels

•  200M@8 channels

•  100M@16 channels

Maximum sampling rate:

stream mode:

• 100M@3 channels

• 50M@6 channels

• 25M@12 channels

• 20M@16 channels

• The max depth:16G@stream;256K@buffer

• Hardware storage:256Kbits

• Trigger:Simple trigger+

• Sixteen level hardware trigger+

• Protocol trigger

• Threshold value:Fixed threshold:0-5v adjustable

• Voltage range:+-30V

• Input impedance:250K||7pF

• State sampling:the max 50M state sampling

Product Details:

• The max sampling rate:400MHz

• It can collect and observe digital signal within 100MHz.

• Overvoltage protection,electrostatic protection,long life

• Support double mode:stream mode,USB real-time transmission to PC,ultra large sampling depth;buffer mode,wide bandwidth hardware storage,ultra high sampling rate

• Adjustable threshold value:support various voltage:1.2V/1.8V/2.5V/3.3V/5.0V

• All metal shell

• 360 degree noise shielding,quick heat dissipation,circuit operation is more stable.

• USB TYPE-C interface

• The max support 16G depth

• 100M sampling rate can collect 160 seconds wave form

• 20M sampling rate can collect 13minutes wave form

• 1M sampling rate can collect 4 hours wave form    

• Window system(xp/vista/win7/win8/win10)

• Multilayer protocol,date is more intuitive

• Support Protocol content triggering

DSLogic different from the logic analyzer features other entry level are mainly the following aspects:

• 256M bit onboard memory to ensure that real-time sampling data up to 1.6Gbps storage. Entry-level logic analyzer Metropolitan bandwidth or memory depth indicators compromise, while greatly reducing the usefulness of such a logic analyzer. For example, real-time transmission through saleae USB memory to store data utilizing the host computer, a good solution to the problem of memory depth, but because of USB bandwidth is limited, can only reach 200-300Mbps sampling bandwidth; Open Workbench Logic Sniffer is used the internal FPGA BRAM as storage space, also has a sampling 1.6Gbps bandwidth, but the memory depth is only 216Kbit.